A single-chip CMOS PCM codec with filters

A single-chip CMOS PCM codec with filters

A complete PCM codec using charge redistribution and switched-capacitor techniques will be described. The device is implemented in a two-level polysilicon CMOS technology using 23.4 mm/SUP 2/ of active area. It features all the required transmission filters needed for telephony, two on-chip voltage...

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Veröffentlicht in:IEEE journal of solid-state circuits 1981-08, Vol.16 (4), p.308-315
Hauptverfasser: Marsh, D.G., Ahuja, B.K., Misawa, T., Dwarakanath, M.R., Fleischer, P.E., Saari, V.R.
Format: Artikel
Sprache:eng
Schlagworte:
Capacitors
Codecs
Costs
Filters
Frequency
Phase change materials
Resistors
Sampling methods
Telephony
Voltage
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Beschreibung
Zusammenfassung:A complete PCM codec using charge redistribution and switched-capacitor techniques will be described. The device is implemented in a two-level polysilicon CMOS technology using 23.4 mm/SUP 2/ of active area. It features all the required transmission filters needed for telephony, two on-chip voltage references, TTL compatible digital interfaces, and low-power dissipation. The architecture of the chip allows asynchronous operation, a variable PCM data rate from 100 kbit/s to 4.096 Mbit/s, /spl mu//A law operation via pin selection, and gain selection at either of two levels in each direction.
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.1981.1051594