Scalable high lead-count parylene package for retinal prostheses

We present the first packaging technology for high lead-count retinal prostheses capable of fully scalable interconnection of a high-density electrode array, a radiofrequency (RF) telemetry coil, and other discrete components, such as chip capacitors, with prefabricated, stand-alone driver circuitry...

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Veröffentlicht in:Sensors and actuators. B, Chemical Chemical, 2006-09, Vol.117 (1), p.107-114
Hauptverfasser: Rodger, Damien C., Weiland, James D., Humayun, Mark S., Tai, Yu-Chong
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Sprache:eng
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Zusammenfassung:We present the first packaging technology for high lead-count retinal prostheses capable of fully scalable interconnection of a high-density electrode array, a radiofrequency (RF) telemetry coil, and other discrete components, such as chip capacitors, with prefabricated, stand-alone driver circuitry. This parylene-based drop-chip technology enables the application-specific integrated circuit (ASIC) to be directly integrated into the fabrication process of the other system components, such that the resulting device is flexible, facilitating surgical implantation. The ASIC-to-electrode interconnects are patterned using standard photolithography and standard microfabrication techniques, enabling the density of interconnects to scale to the limits of the lithographic equipment used to define the etch holes over the on-chip pads. This scheme also enables the simultaneous integration and interconnection of multiple ASICs with the rest of the system in such a way that the best features of chip-level and wafer-level packaging technologies are combined into a single process. Using this technique, standard photolithography and interconnect fabrication has been performed successfully on 10 chips. Electrical test results verify the efficacy of this cost-effective and high-yield packaging scheme, and pave the way for a monolithic implantable parylene-based retinal prosthesis system as well as other systems requiring the capability to perform microfabrication steps on prefabricated chips.
ISSN:0925-4005
1873-3077
DOI:10.1016/j.snb.2005.11.010