SFQ data communication switch
A new SFQ data communication switch has been designed and tested. Complete operation of a 4/spl times/4 switch circuit has been demonstrated with address decoding at low-speed. Transmission through a given path in the switch has been demonstrated for data rates up to 4 Gb/s. Circuit simulations show...
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Veröffentlicht in: | IEEE transactions on applied superconductivity 1997-06, Vol.7 (2), p.2681-2684 |
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Format: | Artikel |
Sprache: | eng |
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Zusammenfassung: | A new SFQ data communication switch has been designed and tested. Complete operation of a 4/spl times/4 switch circuit has been demonstrated with address decoding at low-speed. Transmission through a given path in the switch has been demonstrated for data rates up to 4 Gb/s. Circuit simulations show operation of the switch cells up to 30 Gb/s. The circuit was fabricated using HYPRES's standard 1 kA/cm/sup 2/ niobium process. The switch has a crossbar architecture with an RF SQUID based switch cell at each crosspoint. The address is decoded by means of RSFQ shift registers which are integrated into the switch matrix. The design enables high bit-rate, low crosstalk, non-blocking architecture, NRZ or RZ data format, and self routing of variable length data packets. |
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ISSN: | 1051-8223 1558-2515 |
DOI: | 10.1109/77.621791 |