Integrated switched-capacitor low-pass filter with combined anti-aliasing decimation filter for low frequencies
A new combined antialiasing decimation filter is presented which allows the implementation of a low-frequency switched-capacitor filter on a single chip. Experimental results are presented for a CMOS second-order low-pass filter with 1 dB passband ripple, a cutoff frequency of 2 Hz, and a dynamic ra...
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Veröffentlicht in: | IEEE journal of solid-state circuits 1982-12, Vol.17 (6), p.1024-1029 |
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Hauptverfasser: | , , , , , |
Format: | Artikel |
Sprache: | eng |
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Zusammenfassung: | A new combined antialiasing decimation filter is presented which allows the implementation of a low-frequency switched-capacitor filter on a single chip. Experimental results are presented for a CMOS second-order low-pass filter with 1 dB passband ripple, a cutoff frequency of 2 Hz, and a dynamic range of 84 dB. The decimation filter converts the input clock of 16 kHz into an output clock of 250 Hz. The integrated anti-aliasing filter has a low pole frequency of about 3 kHz. |
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ISSN: | 0018-9200 1558-173X |
DOI: | 10.1109/JSSC.1982.1051856 |