An optimal multiplication algorithm on reconfigurable mesh

An optimal multiplication algorithm on reconfigurable mesh

An O(1) time algorithm to multiply two K-bit binary numbers using an N/spl times/N bit-model of reconfigurable mesh is shown. It uses optimal mesh size and it improves previously known results for multiplication on the reconfigurable mesh. The result is obtained by using novel techniques for data re...

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Veröffentlicht in:IEEE transactions on parallel and distributed systems 1997-05, Vol.8 (5), p.521-532
Hauptverfasser: Ju-Wook Jang, Heonchul Park, Prasanna, V.K.
Format: Artikel
Sprache:eng
Schlagworte:
Arithmetic
Computer networks
Concurrent computing
Digital signal processing chips
Image processing
Message passing
Multidimensional systems
Routing
Very large scale integration
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Zusammenfassung:An O(1) time algorithm to multiply two K-bit binary numbers using an N/spl times/N bit-model of reconfigurable mesh is shown. It uses optimal mesh size and it improves previously known results for multiplication on the reconfigurable mesh. The result is obtained by using novel techniques for data representation and data movement and using multidimensional Rader Transform. The algorithm is extended to result in AT/sup 2/ optimality over 1/spl les/t/spl les//spl radic/N in a variant of the bit-model of VLSI.
ISSN:1045-9219
1558-2183
DOI:10.1109/71.598278