An architecture for computing Zech's logarithms in GF(2/sup m/)

An architecture for computing Zech's logarithms in GF(2/sup m/)

In this paper, a new method for calculation of Zech's logarithm in GF(2/sup m/) is presented. For a given element, the logarithm is calculated by bit operations performed on its binary representation. No look-up tables are used. The proposed method makes feasible the implementation of an univer...

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Veröffentlicht in:IEEE transactions on computers 2000-05, Vol.49 (5), p.519-524
Hauptverfasser: Assis, F.M., Pedreira, C.E.
Format: Artikel
Sprache:eng
Schlagworte:
Architecture
Arithmetic
Computation
Computer architecture
Devices
Logarithms
Mathematical analysis
Representations
Tables
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Beschreibung
Zusammenfassung:In this paper, a new method for calculation of Zech's logarithm in GF(2/sup m/) is presented. For a given element, the logarithm is calculated by bit operations performed on its binary representation. No look-up tables are used. The proposed method makes feasible the implementation of an universal-type device for finite field arithmetic.
ISSN:0018-9340
1557-9956
DOI:10.1109/12.859543