Stacking Fault Formation Sites and Growth in Thick-Epi SiC PiN Diodes

Stacking fault formation sites and growth mechanisms in PiN diodes have been investigated. The diodes were fabricated on a 4H SiC wafer with a 150 *mm thick n- epitaxial layer and a grown p+ anode. Stacking faults and their associated dislocations were examined by light emission imaging. Many of the stacking faults originate from extended string-like clusters that are present before electrical stressing and are observed at depths ranging from 10 to 100 *mm below the SiC surface. Two possible mechanisms for creating these clusters are discussed: (1) nucleation of dislocation loops due to step bunching during epitaxial growth and (2) faulting of basal plane dislocations. Two alternate driving forces for stacking fault growth are also considered: mechanical stress relief and electronic energy lowering. Based on the growing behavior of the stacking faults, it is concluded that mechanical stress is responsible for the stacking fault growth.