An 80-MHz, 80-mW, 8-b CMOS folding A/D converter with distributed track-and-hold preprocessing
An analog-to-digital converter incorporating a distributed track-and-hold preprocessing combined with folding and interpolation techniques has been designed in CMOS technology. The presented extension of the well known folding concept has resulted in a 75 MHz maximum full-scale input signal frequenc...
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Veröffentlicht in: | IEEE journal of solid-state circuits 1996-12, Vol.31 (12), p.1846-1853 |
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Hauptverfasser: | , |
Format: | Artikel |
Sprache: | eng |
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Zusammenfassung: | An analog-to-digital converter incorporating a distributed track-and-hold preprocessing combined with folding and interpolation techniques has been designed in CMOS technology. The presented extension of the well known folding concept has resulted in a 75 MHz maximum full-scale input signal frequency. A signal-to-noise ratio of 44 dB is obtained for this frequency. The 8-b A/D converter achieves a clock frequency of 80 MHz with a power dissipation of 80 mW from a 3.3 V supply voltage. The active chip area is 0.3 mm/sup 2/ in 0.5-/spl mu/m standard digital CMOS technology. |
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ISSN: | 0018-9200 1558-173X |
DOI: | 10.1109/4.545804 |