False lock in quadriphase receivers with unequal < e1 > I < /e1 > - and < e1 > Q < /e1 > -channel data rates

Results are presented concerning the noise-free false lock problem in quadriphase receivers with unequal < e1 > I < /e1 > -channel and < e1 > Q < /e1 > -channel data rates. It is shown that false lock may occur when the incoming carrier frequency and the loop VCO (voltage-controlled oscillator) frequency differ by an amount that is a linear combination of a quarter of < e1 > I < /e1 > -channel and < e1 > Q < /e1 > -channel data rates. General expressions for the false lock performance of quadriphase receivers are given for random as well as periodic data patterns. Specific closed-form expressions for the false lock margin are derived when the arm filters of the quadriphase receivers are single-pole Butterworth filters, and the format of the random data is NRZ (nonreturn-to-zero). Numerical evaluations of false lock margin as a function of the product of 3 dB arm-filter bandwidth and symbol duration are carried out for random data using various arm filters and for different periodic < e1 > I < /e1 > -channel and < e1 > Q < /e1 > -channel data patterns