Fabrication of High-Performance LDDFET's with Oxide Sidewall-Spacer Technology

Fabrication of High-Performance LDDFET's with Oxide Sidewall-Spacer Technology

A fabrication process for the Lightly Doped Drain/Source Field-Effect Transistor, LDDFET, that utilizes RIE produced SiO/sub 2/ sidewall spacers is described. The process is compatible with most conventional polysilicon-gated FET processes and needs no additional photo-masking steps. Excellent contr...

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Veröffentlicht in:IEEE journal of solid-state circuits 1982-04, Vol.17 (2), p.220-226
Hauptverfasser: Tsang, P.J., Ogura, S., Walker, W.W., Shepard, J.F., Critchlow, D.L.
Format: Artikel
Sprache:eng
Schlagworte:
Circuit optimization
Clocks
Etching
Fabrication
FETs
Integrated circuit measurements
Reproducibility of results
Senior members
Space technology
Voltage
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Beschreibung
Zusammenfassung:A fabrication process for the Lightly Doped Drain/Source Field-Effect Transistor, LDDFET, that utilizes RIE produced SiO/sub 2/ sidewall spacers is described. The process is compatible with most conventional polysilicon-gated FET processes and needs no additional photo-masking steps. Excellent control and reproducibility of the n/sup -/ region of the LDD device are obtained. Measurements from dynamic clock generators have shown that LDDFET's have as much as 1.9x performance advantage over conventional devices.
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.1982.1051720