A digital multistandard paging receiver

Many different paging systems exist. Therefore it is very desirable to be able to implement the paging receiver in a way that all major paging standards can be supported. In this paper, a software radio receiver architecture which uses a signal demodulation technique based on a complex digital phase-locked loop is presented. This kind of software radio receiver can easily handle multiple paging standards, and it can easily be implemented in VLSI using the well-known CORDIC algorithm.