A design environment for high-throughput low-power dedicated signal processing systems

A design environment for high-throughput low-power dedicated signal processing systems

A hierarchical automated design flow for low-energy direct-mapped signal processing integrated circuits is presented. A modular framework based on a combined dataflow graph and floorplan description drives automatic layout generation with commercial CAD tools. Automatic characterization of layout im...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:IEEE journal of solid-state circuits 2002-03, Vol.37 (3), p.420-431
Hauptverfasser: Davis, W.R., Zhang, N., Camera, K., Markovic, D., Smilkstein, T., Ammer, M.J., Yeo, E., Augsburger, S., Nikolic, B., Brodersen, R.W.
Format: Artikel
Sprache:eng
Schlagworte:
Baseband
Circuit testing
Circuits
Computer aided design
Decoding
Design automation
Design engineering
Design methodology
Electric potential
Energy efficiency
Low voltage
Modular
Receivers
Signal design
Signal processing
Viterbi algorithm
Voltage
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:A hierarchical automated design flow for low-energy direct-mapped signal processing integrated circuits is presented. A modular framework based on a combined dataflow graph and floorplan description drives automatic layout generation with commercial CAD tools. Automatic characterization of layout improves system-level estimates. Simplified physical design methodologies for low supply voltages are discussed. The flow is demonstrated on a 300-k transistor test-chip, a time-division multiple-access baseband receiver, and a soft-output Viterbi decoder. An example of architectural comparison of energy efficiency is presented.
ISSN:0018-9200
1558-173X
DOI:10.1109/4.987095