A CMOS highly linear channel-select filter for 3G multistandard integrated wireless receivers

A new approach for designing digitally programmable CMOS integrated baseband filters is presented. The proposed technique provides a systematic method for designing filters exhibiting high linearity and low power. A sixth-order Butterworth low-pass filter with 14-bit bandwidth tuning range is design...

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Veröffentlicht in:IEEE journal of solid-state circuits 2002-01, Vol.37 (1), p.27-37
Hauptverfasser: Alzaher, H.A., Elwan, H.O., Ismail, M.
Format: Artikel
Sprache:eng
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Zusammenfassung:A new approach for designing digitally programmable CMOS integrated baseband filters is presented. The proposed technique provides a systematic method for designing filters exhibiting high linearity and low power. A sixth-order Butterworth low-pass filter with 14-bit bandwidth tuning range is designed for implementing the baseband channel-select filter in an integrated multistandard wireless receiver. The filter consumes a current of 2.25 mA from a 2.7-V supply and occupies an area of 1.25 mm/sup 2/ in a 0.5-/spl mu/m chip. The proposed filter design achieves high spurious free dynamic ranges (SFDRs) of 92 dB for PDC (IS-54), 89 dB for GSM, 84 dB for IS-95, and 80 dB for WCDMA.
ISSN:0018-9200
1558-173X
1558-173X
DOI:10.1109/4.974543