A 1.5 V, 4.1 mW dual-channel audio delta-sigma D/A converter

The paper describes a stereo digital-to-analog converter intended for portable digital-audio which operates at 1.5 V and consumes only 4.1 mW. A 15-level quantization, third-order delta-sigma was employed to reduce digital operation speed, relax out-of-band filtering requirements, and enhance immunity to clock jitter. The use of direct charge transfer switched-capacitor technique in the multibit reconstruction DAC reduces kT/C noise and element mismatch without increase of power dissipation. The data weighted averaging algorithm suppresses nonlinearity caused by capacitor mismatch by first-order noise-shaping, thereby making mismatch-induced noise negligible. The stereo audio DAC achieves 90 dB dynamic range and 81 dB peak signal-to-noise-plus-distortion ratio over a 20 kHz passband. The 5.3 mm/sup 2/ chip is fabricated in a 0.6 /spl mu/m CMOS technology which includes low-threshold devices.