Back-gate and series resistance effects in LDMOSFETs on SOI

Back-gate and series resistance effects in LDMOSFETs on SOI

Detailed experimental results are used to develop a new model for the linear region of operation of lateral DMOSFETs (LDMOSFETs) on silicon-on-insulator (SOI) that includes the influence of the buried oxide and back-gate. Back-gate biasing results in double-channel conduction and bias-dependent seri...

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Veröffentlicht in:IEEE transactions on electron devices 2001-10, Vol.48 (10), p.2410-2416
Hauptverfasser: Vandooren, A., Cristoloveanu, S., Mojarradi, M., Kolawa, E.
Format: Artikel
Sprache:eng
Schlagworte:
Architecture
Devices
Extraction
Inversions
Mathematical models
MOSFETs
Oxides
Silicon on insulator technology
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Beschreibung
Zusammenfassung:Detailed experimental results are used to develop a new model for the linear region of operation of lateral DMOSFETs (LDMOSFETs) on silicon-on-insulator (SOI) that includes the influence of the buried oxide and back-gate. Back-gate biasing results in double-channel conduction and bias-dependent series resistance. Pertinent techniques for parameter extraction are presented and contrasted to those currently used in low-voltage SOI MOSFETs. The typical feature of LDMOSFETs is the significant change in series resistance as the back-gate is driven from accumulation to inversion. The model allows a clear identification of the architectural and technological parameters of the device.
ISSN:0018-9383
1557-9646
DOI:10.1109/16.954485