A 50-MHz 8-Mbit video RAM with a column direction drive sense amplifier

An 8-Mb (1-Mwords*8-b) dynamic RAM which utilizes a column direction drive sense amplifier to obtain low peak current is described. The power supply peak current is about one fourth of that for conventional circuits. The chip operates at 50-MHz and is fabricated with a 0.7- mu m n-well CMOS, double-...

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Veröffentlicht in:IEEE journal of solid-state circuits 1990-02, Vol.25 (1), p.30-35
Hauptverfasser: Kotani, H., Akamatsu, H., Matsushima, J., Okada, S., Shiragasawa, T., Yamada, T., Inoue, M.
Format: Artikel
Sprache:eng
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Zusammenfassung:An 8-Mb (1-Mwords*8-b) dynamic RAM which utilizes a column direction drive sense amplifier to obtain low peak current is described. The power supply peak current is about one fourth of that for conventional circuits. The chip operates at 50-MHz and is fabricated with a 0.7- mu m n-well CMOS, double-level polysilicon, single-polycide, and double-level metal technology. The memory cell is a surrounding hi-capacitance cell structure. The cell size is 1.8*3.0 mu m/sup 2/, and the chip area is 12.7*16.91 mm/sup 2/.< >
ISSN:0018-9200
1558-173X
DOI:10.1109/4.50280