256x 256 hybrid HgCdTe infrared focal plane arrays

Hybrid HgCdTe 256x256 focal plane arrays have been developed to meet the sensitivity, resolution, and field-of-view requirements of high-performance medium-wavelength infrared (MWIR) imaging systems. The detector arrays for these hybrids are fabricated on substrates that reduce or eliminate the ther...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:IEEE transactions on electron devices 1991-05, Vol.38 (5), p.1104-1109
Hauptverfasser: Bailey, R B, Kozlowski, L J, Chen, J, Bui, D Q, Vural, K, Edwall, D D, Gil, R V, Vanderwyck, A B, Gertner, E R, Gubala, M B
Format: Artikel
Sprache:eng
Online-Zugang:Volltext
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:Hybrid HgCdTe 256x256 focal plane arrays have been developed to meet the sensitivity, resolution, and field-of-view requirements of high-performance medium-wavelength infrared (MWIR) imaging systems. The detector arrays for these hybrids are fabricated on substrates that reduce or eliminate the thermal expansion mismatch to the silicon readout circuit. The readouts are foundry-processed CMOS switched-FET circuits that have charge capacities greater than 10(7) electrons and a single video output capable of 20-MHz data rates. The high quantum efficiency, tunable absorption wavelength, and broad operating temperature range of these large HgCdTe staring focal plane arrays give them significant advantages over competing sensors. The mature Producible Alternative to CdTe for Epitaxy-1 (PACE-1) technology, using sapphire detector substrates, has demonstrated 256x256 MWIR arrays with mean laboratory noise equivalent temperature difference (NETD) of 9 mK for a 4.9-mum cutoff wavelength, 40-mum pixel size, and 80-K operating temperature. RMS detector response nonuniformities are less than 4%, and pixel yields are greater than 99%. The newly developed PACE-3 process uses silicon for the detector substrate to eliminate completely the thermal mismatch with the silicon readout circuit. It has the potential for similar performance in even larger array sizes. A 640x480 hybrid array is under development
ISSN:0018-9383
DOI:10.1109/16.78385