A 2x 2 analog memory implemented with a special layoutinjector
Using floating gate MOSFETs, we have designed a 2x2 analog memory, which is expandable to any size array. The reduced programming voltage due to the innovative floating gate MOSFETs enables us to construct the analog memory with a standard double poly n-well process. In addition, a novel programming...
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Veröffentlicht in: | IEEE journal of solid-state circuits 1996-06, Vol.31 (6), p.856-859 |
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Hauptverfasser: | , |
Format: | Artikel |
Sprache: | eng |
Online-Zugang: | Volltext |
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Zusammenfassung: | Using floating gate MOSFETs, we have designed a 2x2 analog memory, which is expandable to any size array. The reduced programming voltage due to the innovative floating gate MOSFETs enables us to construct the analog memory with a standard double poly n-well process. In addition, a novel programming algorithm is presented. This method will contribute not only to a reduced total programming time, but also to a prolonged lifetime of the memory. The high voltage program/erase pulses are arranged to minimize the disturbance of nonselected cells. The resolution of a memory cell has been found to be 10 mV over a range of 1.25 V to 2 V which is equivalent to the information content of 6 digital cells |
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ISSN: | 0018-9200 |
DOI: | 10.1109/4.509874 |