A 90 ns 256K x 1 bit DRAM with double-level Al technology

A high-performance 256K /spl times/ 1bit DRAM with double-level Al technology is described. It has a small die size of 8.5 /spl times/ 4.0 mm/SUP 2/, an access time of 90 ns, and a soft error rate of less than 1000 FITs. The first and second Al layers are used as bit lines and word lines, respective...

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Veröffentlicht in:IEEE journal of solid-state circuits 1983-10, Vol.18 (5), p.437-440
Hauptverfasser: Fujii, T., Mitake, K., Tada, K., Inoue, Y., Watanabe, H., Kudoh, O., Yamamoto, H.
Format: Artikel
Sprache:eng
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Zusammenfassung:A high-performance 256K /spl times/ 1bit DRAM with double-level Al technology is described. It has a small die size of 8.5 /spl times/ 4.0 mm/SUP 2/, an access time of 90 ns, and a soft error rate of less than 1000 FITs. The first and second Al layers are used as bit lines and word lines, respectively. Double-level Al technology is also applied to periphery circuit regions and contributes to a 15 percent reduction of die size in conjunction with a simplified sense-restore circuit. A compact memory cell (10.9 /spl times/ 6.1/spl mu/m /SUP 2/) with a storage capacitance of over 50 fF is obtained through the use of wafer stepping and dry etch techniques.
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.1983.1051974