A 1-V TFT-load SRAM using a two-step word-voltage method

A 1-V SRAM using a TFT load cell was developed. Key circuits for obtaining the low-voltage operation are a two-step word-voltage (TSW) method, a submicroampere boosted-level generator using a multivibrator, and a sense amplifier using low-threshold MOSFETs. An access time of 250 ns and a standby cur...

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Veröffentlicht in:IEEE journal of solid-state circuits 1992-11, Vol.27 (11), p.1519-1524
Hauptverfasser: Ishibashi, K., Takasugi, K., Hashimoto, T., Sasaki, K.
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container_end_page 1524
container_issue 11
container_start_page 1519
container_title IEEE journal of solid-state circuits
container_volume 27
creator Ishibashi, K.
Takasugi, K.
Hashimoto, T.
Sasaki, K.
description A 1-V SRAM using a TFT load cell was developed. Key circuits for obtaining the low-voltage operation are a two-step word-voltage (TSW) method, a submicroampere boosted-level generator using a multivibrator, and a sense amplifier using low-threshold MOSFETs. An access time of 250 ns and a standby current of 0.23 mu A were achieved for a 4-kb test chip using a 10.2- mu m/sup 2/ TFT-load cell. This technology is applicable for high-density and single-battery operational SRAMS.< >
doi_str_mv 10.1109/4.165331
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subjects Batteries
Circuit testing
CMOS technology
Electronic equipment
Low voltage
MOSFET circuits
Operational amplifiers
Random access memory
Thin film transistors
Threshold voltage
title A 1-V TFT-load SRAM using a two-step word-voltage method
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