A 100-Msps sampling analog-to-digital converter chip set
The authors describe a 100-Msps sampling analog-to-digital converter (ADC) chip set that can be used for a wideband high-resolution digital storage oscilloscope (DSO). A high conversion rate and a 500-MHz sampling bandwidth with an 8-b effective resolution are obtained by a combination of three Si-b...
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Veröffentlicht in: | IEEE transactions on instrumentation and measurement 1992-04, Vol.41 (2), p.208-211 |
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Format: | Artikel |
Sprache: | eng |
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Zusammenfassung: | The authors describe a 100-Msps sampling analog-to-digital converter (ADC) chip set that can be used for a wideband high-resolution digital storage oscilloscope (DSO). A high conversion rate and a 500-MHz sampling bandwidth with an 8-b effective resolution are obtained by a combination of three Si-bipolar chips and two GaAs-diode chips. the ADC uses a pipelined two-step subranging architecture that uses two cascade wideband track-and-hold (T/H) circuits. The design features of the T/H circuits and the residual amplifier are also presented.< > |
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ISSN: | 0018-9456 1557-9662 |
DOI: | 10.1109/19.137349 |