High-performance direct digital frequency synthesizers using piecewise-polynomial approximation

This paper presents new techniques to implement direct digital frequency synthesizers (DDFSs) with optimized piecewise-polynomial approximation. DDFS performances with piecewise-polynomial approximation are first analyzed, providing theoretical upperbounds for the spurious-free dynamic range (SFDR),...

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Veröffentlicht in:	IEEE transactions on circuits and systems. 1, Fundamental theory and applications Fundamental theory and applications, 2005-02, Vol.52 (2), p.324-337
Hauptverfasser:	De Caro, D., Strollo, A.G.M.
Format:	Artikel
Sprache:	eng
Schlagworte:	Arithmetic Circuits CMOS digital integrated circuits Computer architecture Direct digital frequency synthesis (DDFS) direct digital synthesis (DDS) Dynamic range frequency synthesis Frequency synthesizers interpolation Performance analysis phase-to-sinusoid amplitude conversion Piecewise linear techniques Read only memory Signal analysis Signal to noise ratio Studies
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