Flip chip PBGAs: Board-level reliability and testing

Flip chip packaging has seen explosive growth in recent years, with more and more high-performance devices being designed in flip chip technology. Additionally, flip-chip-in-package (FCIP) is increasingly seen as a solution for higher I/O devices. LSI Logic has developed an assembly process for organic flip chip packages, and a cross-section view of a flip chip plastic ball grid array (FPBGA) package is shown in Figure 1. It consists of a die flipped and attached to an organic substrate using eutectic solder bumps. The solder bumps on the die are either in a full array or in a depopulated grid array. An underfill epoxy fills the gap between the die and the substrate to provide a reliable connection between the die and the organic substrate. The package has a stiffener ring attached directly to the substrate to reduce the warpage due to the mismatch of the coefficients of thermal expansion (CTE) of the die and the substrate. A heat spreader is attached to the top of the die with a thermal compound and to the stiffener to provide a thermal path for enhanced heat dissipation.