Characteristics of Cell Latch and Leakage Current at Standby State in 6-T Low-Power Static Random Access Memory (SRAM) Device
The standby current at device off-state is investigated against the measuring mode in 6-T and low-power static random access memory (SRAM) device with short gate length of 0.12 mu m and high density of 32 M-bit. There is a difference of the standby currents between initial and D0 modes and this disc...
Gespeichert in:
Veröffentlicht in: | Japanese Journal of Applied Physics 2003-02, Vol.42 (Part 2, No. 2B), p.L151-L153 |
---|---|
Hauptverfasser: | , , , |
Format: | Artikel |
Sprache: | eng |
Online-Zugang: | Volltext |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | The standby current at device off-state is investigated against the measuring mode in 6-T and low-power static random access memory (SRAM) device with short gate length of 0.12 mu m and high density of 32 M-bit. There is a difference of the standby currents between initial and D0 modes and this discrepancy in the standby current is related to the leakage current of cell n-type MOSFET, especially pull-down transistor. This discrepancy in the standby currents among the measuring modes can be explained with the characteristic of the cell latch using its dependence on the leakage current of pull-down transistor, and it is shown that the cell spontaneously moves to minimize the standby current. 1 ref. |
---|---|
ISSN: | 0021-4922 |
DOI: | 10.1143/JJAP.42.L151 |