Vehicular speed response PLL using square-law circuits

In this paper, we propose using a square‐law loop circuit that does not require a pilot signal in a vehicular speed response phase‐locked loop (PLL) and study its performance. In the PLL performance in the fading transmission path in mobile communications, a vehicular speed response PLL improves the PLL performance by using a directional antenna to lengthen the fading period and by providing frequency offset information generated in response to the vehicular speed to the PLL. Compared with a PLL using a conventional square‐law circuit, the proposed scheme effectively uses the cancellation effect of the frequency offset and the loop gain adaptation based on the vehicular speed response to obtain substantial improvement in the bit error rate. A substantial improvement is exhibited, particularly in an environment having a high fDT. © 2002 Wiley Periodicals, Inc. Electron Comm Jpn Pt 3, 85(8): 22–29, 2002; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/ecjc.1109