Synthesis and analysis of sigma-delta modulators employing continuous-time filters

A methodology for analysis and synthesis of lowpass sigma-delta ( capital sigma Delta ) converters is presented in this paper. This method permits the synthesis of capital sigma Delta modulators employing continuous-time filters from discrete-time topologies. The analysis method is based on the discretization of a continuous-time model and using a discrete simulator, which is more efficient than an analog simulator. In our analysis approach, the influence of the sample and hold block and non-idealities of the feedback DAC can be systematically modeled by discrete-time systems. Finally, a realistic design of a second-order capital sigma Delta modulator with a compensation of the non-ideal behavior of the DAC is given. Moreover, simulation results show a good agreement with the theoretical predictions.