A Novel Process for Fabricating High Density Trench MOSFETs for DC‐DC Converters

We propose a new process technique for fabricating very high‐density trench MOSFETs using 3 mask layers with oxide spacers and a self‐aligned technique. This technique reduces the device size in trench width, source, and p‐body region with a resulting increase in cell density and current driving cap...

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Veröffentlicht in:ETRI journal 2002-10, Vol.24 (5), p.333-340
Hauptverfasser: Kim, Jongdae, Roh, Tae Moon, Kim, Sang‐Gi, Park, Il‐Yong, Yang, Yil Suk, Lee, Dae‐Woo, Koo, Jin‐Gun, Cho, Kyoung‐Ik, Kang, Young Il
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Sprache:eng
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Zusammenfassung:We propose a new process technique for fabricating very high‐density trench MOSFETs using 3 mask layers with oxide spacers and a self‐aligned technique. This technique reduces the device size in trench width, source, and p‐body region with a resulting increase in cell density and current driving capability as well as cost‐effective production capability. We were able to obtain a higher breakdown voltage with uniform oxide grown along the trench surface. The channel density of the trench DMOSFET with a cell pitch of 2.3‐2.4 µm was 100 Mcell/in2 and a specific on‐resistance of 0.41 mΩ·cm2 was obtained under a blocking voltage of 43 V.
ISSN:1225-6463
2233-7326
DOI:10.4218/etrij.02.0102.0501