High-voltage devices for 0.5-μm standard CMOS technology

High-voltage devices for 0.5-μm standard CMOS technology

The feasibility of the smart voltage extension (SVX) technique featuring complementary high-voltage devices without any modifications of the process steps of an 0.5-μm standard CMOS technology is discussed here. This letter focuses on the optimization of the breakdown voltage of the HVNMOS as well a...

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Veröffentlicht in:IEEE electron device letters 2000-01, Vol.21 (1), p.40-42
Hauptverfasser: Bassin, C., Ballan, H., Declercq, M.
Format: Artikel
Sprache:eng
Schlagworte:
Breakdown
CMOS
CMOS technology
Current density
Devices
Doping
Electric potential
Electrons
Electrostatics
Feasibility
Immune system
MOSFETs
Optimization
Silicon
Voltage
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Zusammenfassung:The feasibility of the smart voltage extension (SVX) technique featuring complementary high-voltage devices without any modifications of the process steps of an 0.5-μm standard CMOS technology is discussed here. This letter focuses on the optimization of the breakdown voltage of the HVNMOS as well as the possible implementation of the HVPMOS. Different high-voltage options with increasing process modification steps are discussed as a function of the required high-voltage capabilities.
ISSN:0741-3106
1558-0563
DOI:10.1109/55.817446