Device Simulation of Grain Boundaries with Oxide-Silicon Interface Roughness in Laser-Crystallized Polycrystalline Silicon Thin-Film Transistors
For laser-crystallized polycrystalline silicon thin-film transistors, the effect of grain boundaries with oxide-silicon interface roughness on the transistor characteristics has been analyzed using device simulation. When grain boundaries and interface roughness are considered simultaneously, degrad...
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Veröffentlicht in: | Japanese Journal of Applied Physics 2000-08, Vol.39 (8A), p.L775-L778 |
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Hauptverfasser: | , , , |
Format: | Artikel |
Sprache: | eng |
Online-Zugang: | Volltext |
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Zusammenfassung: | For laser-crystallized polycrystalline silicon thin-film transistors, the effect of grain boundaries with oxide-silicon interface roughness on the transistor characteristics has been analyzed using device simulation. When grain boundaries and interface roughness are considered simultaneously, degradation of the on-current caused by grain boundaries is reduced by the interface roughness because the electric field concentration increases the carrier density and improves the conductance. |
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ISSN: | 0021-4922 1347-4065 |
DOI: | 10.1143/JJAP.39.L775 |