Dry etch improvements in the SOI wafer flow process for IPL stencil mask fabrication
The 4x Ion Projection Lithography (IPL), which is designed to reach sub 100nm resolution on the wafer plane, uses stencil membrane masks out of 150mm SOI (Silicon On Insulator) wafers [1]. The structured circular membranes have a diameter of 126mm and a thickness of 3μm. Results of a new sub-quarter...
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| Veröffentlicht in: | Microelectronic engineering 2000-06, Vol.53 (1), p.609-612 |
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| container_title | Microelectronic engineering |
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| creator | Letzkus, F. Butschke, J. Höfflinger, B. Irmscher, M. Reuter, C. Springer, R. Ehrmann, A. Mathuni, J. |
| description | The 4x Ion Projection Lithography (IPL), which is designed to reach sub 100nm resolution on the wafer plane, uses stencil membrane masks out of 150mm SOI (Silicon On Insulator) wafers [1]. The structured circular membranes have a diameter of 126mm and a thickness of 3μm. Results of a new sub-quarter micron trench etch and membrane dry etch process are presented and discussed. |
| doi_str_mv | 10.1016/S0167-9317(00)00388-9 |
| format | Article |
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| fulltext | fulltext |
| identifier | ISSN: 0167-9317 |
| ispartof | Microelectronic engineering, 2000-06, Vol.53 (1), p.609-612 |
| issn | 0167-9317 1873-5568 |
| language | eng |
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| source | Elsevier ScienceDirect Journals Complete |
| subjects | Applied sciences Design. Technologies. Operation analysis. Testing Electronics Exact sciences and technology Integrated circuits Lithography, masks and pattern transfer Microelectronic fabrication (materials and surfaces technology) Microelectronics: LSI, VLSI, ULSI integrated circuit fabrication technology Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices |
| title | Dry etch improvements in the SOI wafer flow process for IPL stencil mask fabrication |
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