Fast context switches: compiler and architectural support for preemptive scheduling
This paper addresses the possibility of reducing the overhead due to preemptive context switching in real-time systems that use preemptive scheduling. The method introduced attempts to avoid saving and restoring registers by performing context switches at points in the program where only a small sub...
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Veröffentlicht in: | Microprocessors and microsystems 1995, Vol.19 (1), p.35-42 |
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Format: | Artikel |
Sprache: | eng |
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Zusammenfassung: | This paper addresses the possibility of reducing the overhead due to preemptive context switching in real-time systems that use preemptive scheduling. The method introduced attempts to avoid saving and restoring registers by performing context switches at points in the program where only a small subset of the registers are live. When context switches occur frequently, which is the case in some real-time systems, performing context switches at fast context switch points is found to significantly reduce the total number of memory references. A new optimization technique, known as register remapping, is introduced which increases the number of these fast context switch points without degrading the efficiency of the code. |
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ISSN: | 0141-9331 1872-9436 |
DOI: | 10.1016/0141-9331(95)93086-X |