Methodology for the verification of a `system on chip

This paper summarizes the verification effort of a complex ASIC designated to be an `all in one' ISDN network router. This ASIC is unique because it actually consists of many independent components, called `cores' (including the processor). The integration of these components onto one chip...

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Hauptverfasser: Geist, Daniel, Biran, Giora, Arons, Tamara, Slavkin, Michael, Nustov, Yvgeny, Farkas, Monica, Holtz, Karen, Long, Andy, King, Dave, Barret, Steve
Format: Tagungsbericht
Sprache:eng
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Beschreibung
Zusammenfassung:This paper summarizes the verification effort of a complex ASIC designated to be an `all in one' ISDN network router. This ASIC is unique because it actually consists of many independent components, called `cores' (including the processor). The integration of these components onto one chip results in an ISOC (Integrated System On a Chip). The complexity of verifying an ISOC is virtually impossible without a proper methodology. This paper presents the methodology developed for verifying the router. In particular, the verification method as well as the tools that were built to execute this method are presented. Finally, a summary of the verification results is given.
ISSN:0738-100X