Performance analysis of speeded‐up high‐speed packet switches
In this paper, we study the performance of high‐speed packet switches, where the switch fabric operates at a slightly higher speed than the links, i.e., a speeded‐up switch. Such structures are by no means new and there are two well studied architectures in the literature for such packet switches: p...
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| Veröffentlicht in: | Journal of high speed networks 2001-01, Vol.10 (3), p.161-186 |
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| Hauptverfasser: | , , |
| Format: | Artikel |
| Sprache: | eng |
| Online-Zugang: | Volltext |
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