Integrating scheduling and physical design into a coherent compilation cycle for reconfigurable computing architectures

Advances in the FPGA technology, both in terms of device capacity and architecture, have resulted in introduction of reconfigurable computing machines, where the hardware adapts itself to the running application to gain speedup. To keep up with the ever-growing performance expectations of such syste...

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Bibliographische Detailangaben
Hauptverfasser: Bazargan, Kia, Ogrenci, Seda, Sarrafzadeh, Majid
Format: Tagungsbericht
Sprache:eng
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