Low-voltage CMOS frequency synthesizer for ERMES pager application

Low-voltage CMOS frequency synthesizer for ERMES pager application

A low-voltage frequency synthesizer fabricated with a 0.35-/spl mu/m standard CMOS technology is presented. A 1 V dual-modulus prescaler using the dynamic back-gate forward bias method has been developed for low-voltage operation. The prescaler, including a preamplifier, measured at 1 V supply volta...

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Veröffentlicht in:IEEE transactions on circuits and systems. 2, Analog and digital signal processing Analog and digital signal processing, 2001-09, Vol.48 (9), p.826-834
Hauptverfasser: Hsu, June-Ming, Dehng, Guang-Kaai, Yang, Ching-Yuan, Yang, Chu-Yuan, Liu, Shen-Iuan
Format: Artikel
Sprache:eng
Schlagworte:
CMOS technology
Frequency measurement
Frequency synthesizers
Noise measurement
Phase measurement
Power dissipation
Power measurement
Preamplifiers
Voltage
Voltage-controlled oscillators
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Beschreibung
Zusammenfassung:A low-voltage frequency synthesizer fabricated with a 0.35-/spl mu/m standard CMOS technology is presented. A 1 V dual-modulus prescaler using the dynamic back-gate forward bias method has been developed for low-voltage operation. The prescaler, including a preamplifier, measured at 1 V supply voltage has a maximum operating frequency of 170 MHz, and its power dissipation is only 0.9 mW. The voltage-controlled oscillator (VCO) in the frequency synthesizer is an LC-tank based oscillator. When locked at the oscillation frequency of 148 MHz, the measured phase noise of the VCO is -106 dBc/Hz at -100-kHz from the carrier. The whole power consumption of the frequency synthesizer is 10.5 mW.
ISSN:1057-7130
1558-125X
DOI:10.1109/82.964995