A high-speed, low-power SOI CMOS circuit with variable threshold voltages

We have proposed a high‐speed, low‐power CMOS circuit that controls the substrate voltage of the SOI MOSFET by the output voltage of a CMOS inverter circuit. This circuit operates at a power supply voltage of 1 V or lower with a nearly constant delay for rise times and fall times of the input signal...

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Veröffentlicht in:Electronics & communications in Japan. Part 2, Electronics Electronics, 2001-05, Vol.84 (5), p.20-28
Hauptverfasser: Higuchi, Hisayuki, Ikeda, Takahide
Format: Artikel
Sprache:eng
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Zusammenfassung:We have proposed a high‐speed, low‐power CMOS circuit that controls the substrate voltage of the SOI MOSFET by the output voltage of a CMOS inverter circuit. This circuit operates at a power supply voltage of 1 V or lower with a nearly constant delay for rise times and fall times of the input signal from 10 ps to 500 ps and has a maximum reduction of 60% in the delay time compared to a conventional circuit. We defined the structure to speed up this circuit and illustrated the relationship between the MOSFET device parameters and the circuit characteristics. The power consumption during standby in this circuit can be reduced to 1 nW by adjusting the supply voltage to the MOSFET substrate. © 2001 Scripta Technica, Electron Comm Jpn Pt 2, 84(5): 20–28, 2001
ISSN:8756-663X
1520-6432
DOI:10.1002/ecjb.1025