Cleaning status on low- k dielectric in advanced VLSI interconnect: : Characterisation and principal issues

This work presents an analysis of interconnect cleaning for low- k/copper integration. Analytical data from ToF–SIMS, AES and FIB–TEM are combined to understand the mechanisms and efficacy of available cleaning chemistries in the presence of Cu and organic, Si-based, and hybrid dielectrics. The use of three different chemistry approaches is evaluated.