Monolithic CMOS digital integrated circuits in 6H-SiC using an implanted p-well process
We report the first p-well Complementary Metal Oxide Semiconductor (CMOS) digital integrated circuits in 6H-SiC. Enhancement mode NMOSFET's and PMOSFET's are fabricated on implanted p-wells and n-type epilayers, respectively. CMOS logic circuits such as inverters, NAND, NOR, XOR, flip-flop...
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Veröffentlicht in: | IEEE electron device letters 1997-05, Vol.18 (5), p.194-196 |
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creator | Ryu, S. Kornegay, K.T. Cooper, J.A. Melloch, M.R. |
description | We report the first p-well Complementary Metal Oxide Semiconductor (CMOS) digital integrated circuits in 6H-SiC. Enhancement mode NMOSFET's and PMOSFET's are fabricated on implanted p-wells and n-type epilayers, respectively. CMOS logic circuits such as inverters, NAND, NOR, XOR, flip-flops, half adders, and 11-stage ring oscillators are implemented using these devices and operated at room temperature, The inverters show stable operation at room temperature and 300/spl deg/C with V/sub dd/=10 and 15 V. |
doi_str_mv | 10.1109/55.568759 |
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Enhancement mode NMOSFET's and PMOSFET's are fabricated on implanted p-wells and n-type epilayers, respectively. CMOS logic circuits such as inverters, NAND, NOR, XOR, flip-flops, half adders, and 11-stage ring oscillators are implemented using these devices and operated at room temperature, The inverters show stable operation at room temperature and 300/spl deg/C with V/sub dd/=10 and 15 V.</description><identifier>ISSN: 0741-3106</identifier><identifier>EISSN: 1558-0563</identifier><identifier>DOI: 10.1109/55.568759</identifier><identifier>CODEN: EDLEDZ</identifier><language>eng</language><publisher>IEEE</publisher><subject>Annealing ; CMOS digital integrated circuits ; CMOS logic circuits ; CMOS process ; CMOS technology ; Implants ; Inverters ; MOS devices ; MOSFET circuits ; Temperature</subject><ispartof>IEEE electron device letters, 1997-05, Vol.18 (5), p.194-196</ispartof><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c405t-d6892e68cc6b01680b7710a0056ae74d385c73cf27dbb8b788794d94670971f23</citedby><cites>FETCH-LOGICAL-c405t-d6892e68cc6b01680b7710a0056ae74d385c73cf27dbb8b788794d94670971f23</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/568759$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/568759$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Ryu, S.</creatorcontrib><creatorcontrib>Kornegay, K.T.</creatorcontrib><creatorcontrib>Cooper, J.A.</creatorcontrib><creatorcontrib>Melloch, M.R.</creatorcontrib><title>Monolithic CMOS digital integrated circuits in 6H-SiC using an implanted p-well process</title><title>IEEE electron device letters</title><addtitle>LED</addtitle><description>We report the first p-well Complementary Metal Oxide Semiconductor (CMOS) digital integrated circuits in 6H-SiC. Enhancement mode NMOSFET's and PMOSFET's are fabricated on implanted p-wells and n-type epilayers, respectively. CMOS logic circuits such as inverters, NAND, NOR, XOR, flip-flops, half adders, and 11-stage ring oscillators are implemented using these devices and operated at room temperature, The inverters show stable operation at room temperature and 300/spl deg/C with V/sub dd/=10 and 15 V.</description><subject>Annealing</subject><subject>CMOS digital integrated circuits</subject><subject>CMOS logic circuits</subject><subject>CMOS process</subject><subject>CMOS technology</subject><subject>Implants</subject><subject>Inverters</subject><subject>MOS devices</subject><subject>MOSFET circuits</subject><subject>Temperature</subject><issn>0741-3106</issn><issn>1558-0563</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>1997</creationdate><recordtype>article</recordtype><recordid>eNqNkU1Lw0AQhhdRsFYPXj3tSfCwdTb7fZSgVmjpoYrHsNls6kqaxGyC-O9NiXjuaWDm4ZkXXoSuKSwoBXMvxEJIrYQ5QTMqhCYgJDtFM1CcEkZBnqOLGD8BKOeKz9D7uqmbKvQfweF0vdniIuxCbysc6t7vOtv7ArvQuSH0cdxhuSTbkOIhhnqHbY3Dvq1sfaBa8u2rCrdd43yMl-istFX0V39zjt6eHl_TJVltnl_ShxVxHERPCqlN4qV2TuZApYZcKQoWxtTWK14wLZxirkxUkec6V1orwwvDpQKjaJmwObqdvOPfr8HHPtuH6MYgtvbNELNEG5loEEeATCuQRxilMIaJg_FuAl3XxNj5Mmu7sLfdT0YhO5SRCZFNZYzszcQG7_0_93f8BXPqgnY</recordid><startdate>19970501</startdate><enddate>19970501</enddate><creator>Ryu, S.</creator><creator>Kornegay, K.T.</creator><creator>Cooper, J.A.</creator><creator>Melloch, M.R.</creator><general>IEEE</general><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>7U5</scope><scope>8FD</scope><scope>L7M</scope></search><sort><creationdate>19970501</creationdate><title>Monolithic CMOS digital integrated circuits in 6H-SiC using an implanted p-well process</title><author>Ryu, S. ; Kornegay, K.T. ; Cooper, J.A. ; Melloch, M.R.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c405t-d6892e68cc6b01680b7710a0056ae74d385c73cf27dbb8b788794d94670971f23</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>1997</creationdate><topic>Annealing</topic><topic>CMOS digital integrated circuits</topic><topic>CMOS logic circuits</topic><topic>CMOS process</topic><topic>CMOS technology</topic><topic>Implants</topic><topic>Inverters</topic><topic>MOS devices</topic><topic>MOSFET circuits</topic><topic>Temperature</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Ryu, S.</creatorcontrib><creatorcontrib>Kornegay, K.T.</creatorcontrib><creatorcontrib>Cooper, J.A.</creatorcontrib><creatorcontrib>Melloch, M.R.</creatorcontrib><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Solid State and Superconductivity Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE electron device letters</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Ryu, S.</au><au>Kornegay, K.T.</au><au>Cooper, J.A.</au><au>Melloch, M.R.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Monolithic CMOS digital integrated circuits in 6H-SiC using an implanted p-well process</atitle><jtitle>IEEE electron device letters</jtitle><stitle>LED</stitle><date>1997-05-01</date><risdate>1997</risdate><volume>18</volume><issue>5</issue><spage>194</spage><epage>196</epage><pages>194-196</pages><issn>0741-3106</issn><eissn>1558-0563</eissn><coden>EDLEDZ</coden><abstract>We report the first p-well Complementary Metal Oxide Semiconductor (CMOS) digital integrated circuits in 6H-SiC. Enhancement mode NMOSFET's and PMOSFET's are fabricated on implanted p-wells and n-type epilayers, respectively. CMOS logic circuits such as inverters, NAND, NOR, XOR, flip-flops, half adders, and 11-stage ring oscillators are implemented using these devices and operated at room temperature, The inverters show stable operation at room temperature and 300/spl deg/C with V/sub dd/=10 and 15 V.</abstract><pub>IEEE</pub><doi>10.1109/55.568759</doi><tpages>3</tpages></addata></record> |
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subjects | Annealing CMOS digital integrated circuits CMOS logic circuits CMOS process CMOS technology Implants Inverters MOS devices MOSFET circuits Temperature |
title | Monolithic CMOS digital integrated circuits in 6H-SiC using an implanted p-well process |
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