The PowerPC 604 RISC microprocessor

The PowerPC 604 RISC microprocessor uses out-of-order and speculative execution techniques to extract instruction-level parallelism. The microprocessor's execution pipelines, fast branch misprediction recovery and decoupled memory queues support speculative execution.

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Bibliographische Detailangaben
Veröffentlicht in:	IEEE MICRO 1994-10, Vol.14 (5), p.8-p17
Hauptverfasser:	Song, S.P., Denman, M., Chang, J.
Format:	Artikel
Sprache:	eng
Schlagworte:	Clocks Computer memory Decoding Frequency Microcomputers Microprocessors Out of order Pipelines Reduced instruction set computing Registers System-on-a-chip
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Beschreibung
Zusammenfassung:	The PowerPC 604 RISC microprocessor uses out-of-order and speculative execution techniques to extract instruction-level parallelism. The microprocessor's execution pipelines, fast branch misprediction recovery and decoupled memory queues support speculative execution.
ISSN:	0272-1732 1937-4143
DOI:	10.1109/MM.1994.363071