Arithmetic operations using binary encoding modified-signed-digit system

The modified-signed-digit (MSD) number system offers parallel carry-free addition and subtraction, which is attractive to the design of a fully parallel processor. A two-state MSD adder/subtractor using binary encoding modified-signed-digit system is proposed, in which twelve substitution rules are employed in the MSD adder/subtractor. Using the binary encoding MSD scheme, each stage of the MSD arithmetic operations is realized by simple logic operations, therefore, its optical implementation can use well-developed binary optical components. An optical architecture of the two-stage MSD adder using programmable triple-in logic gate is presented and preliminary results are presented.