High-performance computing using a reconfigurable accelerator

The paper introduces the MoM‐3 as a reconfigurable accelerator for high performance computing at a moderate price. By using a new machine paradigm to trigger the operations in the MoM‐3, this accelerator is especially suited to scientific algorithms, where the hardware structure can be configured to...

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Veröffentlicht in:Concurrency (Chichester, England.) England.), 1996-07, Vol.8 (6), p.429-443
Hauptverfasser: Hartenstein, Reiner W., Becker, Jürgen, Kress, Rainer, Reinig, Helmut
Format: Artikel
Sprache:eng
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Zusammenfassung:The paper introduces the MoM‐3 as a reconfigurable accelerator for high performance computing at a moderate price. By using a new machine paradigm to trigger the operations in the MoM‐3, this accelerator is especially suited to scientific algorithms, where the hardware structure can be configured to match the structure of the algorithm. The MoM‐3 efficiently uses reconfigurable logic devices to provide a fine‐grain parallelism, and multiple address generators to have the complete memory bandwidth free for data transfers (instead of fetching address computing instructions). Speed‐up factors up to 82, compared to state‐of‐the‐art workstations, are demonstrated by means of an Ising spin system simulation example. Adding the MoM‐3 as an accelerator enables achievement of supercomputer performance from a low‐cost workstation.
ISSN:1040-3108
1096-9128
DOI:10.1002/(SICI)1096-9128(199607)8:6<429::AID-CPE252>3.0.CO;2-9