A method for determining the yield of indium bump contacts for integration in hybrid focal plane arrays at room temperature

A simple electrical method for determining the yield of indium bump integration between the infrared photosensing chip and the silicon readout chip in hybrid focal plane arrays (FPAs) is proposed. In our case, the IR photosensing chip consists of a 16 × 16 HgCdTe (MCT) photovoltaic (PV) array and the readout chip is a 16 × 16 silicon-CCD multiplexer (MUX). However, the method can be used for even larger array sizes. The method allows one to determine the yield of integration at room temperature. In addition, it does not necessitate the vacuum sealing of hybrid FPA in the dewar and subsequent testing at 77 K for determining this yield. The proposed method essentially verifies the electrical connectivity between the MCT PV diodes and their corresponding input diffusions in the CCD MUX on pixel-to-pixel basis. A simple examination of the readout of the whole array on the oscilloscope at room temperature, initiated at the detector and through CCD MUX is used for determining exactly how many MCT PV diodes have been joined successfully to their corresponding CCD MUX pixels after indium bump integration.