Novel fabrication technique for dual-gate MOS transistors

We present a fabrication sequence which yields controlling isolated gates both above and below a conductance-modulated silicon film. Selective lateral overgrowth is performed for the first time with trichlorosilane, circumventing contamination problems with aggressive hydrochloric gas. The overgrowth is restricted to device scale to allow contacts to the substrate from the top surface. A self-limiting planarization technique by chemo-mechanical polishing is described to thin overgrowths to 0.7 μm thickness with better than 10% uniformity. Devices of bulk quality were implemented both in the substrate and in the overgrowth to demonstrate the capabilities of this new processing technology.