Design of a high performance CMOS adder for both a high performance array and an accumulator
This paper describes the design of a high performance static adder in CMOS pass logic. The adder we present is not only the fastest CMOS adder, in comparison with other published results using the same model and process parameters, but it is also the most area efficient. An attempt to design a high...
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Veröffentlicht in: | Microelectronics 1991, Vol.22 (5-6), p.65-73 |
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Hauptverfasser: | , |
Format: | Artikel |
Sprache: | eng |
Online-Zugang: | Volltext |
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