JFET/SOS devices--part I: Transistor characteristics and modeling results

JFET/SOS devices--part I: Transistor characteristics and modeling results

A process for fabricating n-channel junction field-effect transistors on silicon-on-sapphire (SOS) wafers has been developed. Both enhancement- and depletion-mode transistors were fabricated, and their characteristics were measured and are discussed. All dopants were ion implanted. A number of calcu...

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Veröffentlicht in:IEEE transactions on electron devices 1988-01, Vol.35 (3), p.353-358
Hauptverfasser: Halle, L F, Knudsen, J F
Format: Artikel
Sprache:eng
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Zusammenfassung:A process for fabricating n-channel junction field-effect transistors on silicon-on-sapphire (SOS) wafers has been developed. Both enhancement- and depletion-mode transistors were fabricated, and their characteristics were measured and are discussed. All dopants were ion implanted. A number of calculational tools, including SU-PREM-II, were used to estimate the junction depths and the mode of device operation.
ISSN:0018-9383
DOI:10.1109/16.2461