Recent advances in solid-phase epitaxial recrystallization of SOS with applications to CMOS and bipolar devices

Recent advances in solid-phase epitaxial recrystallization suggest that this technology may dramatically improve the crystallinity of heteroepitaxial silicon-on-insulators, such as silicon-on-sapphire (SOS). Recent improvements of 0.3- and 0.5-μm SOS films using two solid-phase epitaxial recrystalli...

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Veröffentlicht in:IEEE circuits and devices magazine 1987-07, Vol.3 (4), p.17-19
1. Verfasser: Vasudev, P. K.
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description Recent advances in solid-phase epitaxial recrystallization suggest that this technology may dramatically improve the crystallinity of heteroepitaxial silicon-on-insulators, such as silicon-on-sapphire (SOS). Recent improvements of 0.3- and 0.5-μm SOS films using two solid-phase epitaxial recrystallization processes (SPEAR and DSPE) are reported. Both techniques have reduced the total microtwin densities of SOS samples by more than 100-fold, while increasing electron and hole mobilities approximately 50%. The resulting properties are very close to those of bulk silicon. High-performance submicrometer CMOS devices and circuits in 0.3-μm recrystallized SOS films have been fabricated.
doi_str_mv 10.1109/MCD.1987.6323128
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K.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Recent advances in solid-phase epitaxial recrystallization of SOS with applications to CMOS and bipolar devices</atitle><jtitle>IEEE circuits and devices magazine</jtitle><stitle>CD-M</stitle><date>1987-07-01</date><risdate>1987</risdate><volume>3</volume><issue>4</issue><spage>17</spage><epage>19</epage><pages>17-19</pages><issn>8755-3996</issn><eissn>1558-1888</eissn><coden>ICDMEN</coden><abstract>Recent advances in solid-phase epitaxial recrystallization suggest that this technology may dramatically improve the crystallinity of heteroepitaxial silicon-on-insulators, such as silicon-on-sapphire (SOS). Recent improvements of 0.3- and 0.5-μm SOS films using two solid-phase epitaxial recrystallization processes (SPEAR and DSPE) are reported. Both techniques have reduced the total microtwin densities of SOS samples by more than 100-fold, while increasing electron and hole mobilities approximately 50%. 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subjects CMOS integrated circuits
CMOS technology
Epitaxial growth
Logic gates
Silicon
title Recent advances in solid-phase epitaxial recrystallization of SOS with applications to CMOS and bipolar devices
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