Recent advances in solid-phase epitaxial recrystallization of SOS with applications to CMOS and bipolar devices
Recent advances in solid-phase epitaxial recrystallization suggest that this technology may dramatically improve the crystallinity of heteroepitaxial silicon-on-insulators, such as silicon-on-sapphire (SOS). Recent improvements of 0.3- and 0.5-μm SOS films using two solid-phase epitaxial recrystalli...
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Veröffentlicht in: | IEEE circuits and devices magazine 1987-07, Vol.3 (4), p.17-19 |
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description | Recent advances in solid-phase epitaxial recrystallization suggest that this technology may dramatically improve the crystallinity of heteroepitaxial silicon-on-insulators, such as silicon-on-sapphire (SOS). Recent improvements of 0.3- and 0.5-μm SOS films using two solid-phase epitaxial recrystallization processes (SPEAR and DSPE) are reported. Both techniques have reduced the total microtwin densities of SOS samples by more than 100-fold, while increasing electron and hole mobilities approximately 50%. The resulting properties are very close to those of bulk silicon. High-performance submicrometer CMOS devices and circuits in 0.3-μm recrystallized SOS films have been fabricated. |
doi_str_mv | 10.1109/MCD.1987.6323128 |
format | Article |
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K.</creator><creatorcontrib>Vasudev, P. K.</creatorcontrib><description>Recent advances in solid-phase epitaxial recrystallization suggest that this technology may dramatically improve the crystallinity of heteroepitaxial silicon-on-insulators, such as silicon-on-sapphire (SOS). Recent improvements of 0.3- and 0.5-μm SOS films using two solid-phase epitaxial recrystallization processes (SPEAR and DSPE) are reported. Both techniques have reduced the total microtwin densities of SOS samples by more than 100-fold, while increasing electron and hole mobilities approximately 50%. The resulting properties are very close to those of bulk silicon. High-performance submicrometer CMOS devices and circuits in 0.3-μm recrystallized SOS films have been fabricated.</description><identifier>ISSN: 8755-3996</identifier><identifier>EISSN: 1558-1888</identifier><identifier>DOI: 10.1109/MCD.1987.6323128</identifier><identifier>CODEN: ICDMEN</identifier><language>eng</language><publisher>IEEE</publisher><subject>CMOS integrated circuits ; CMOS technology ; Epitaxial growth ; Logic gates ; Silicon</subject><ispartof>IEEE circuits and devices magazine, 1987-07, Vol.3 (4), p.17-19</ispartof><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c292t-ffc3071c2e5aea880f897526aa4eaa7a6805177e165c92048ee64f425892b81d3</citedby></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6323128$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,796,27924,27925,54758</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6323128$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Vasudev, P. K.</creatorcontrib><title>Recent advances in solid-phase epitaxial recrystallization of SOS with applications to CMOS and bipolar devices</title><title>IEEE circuits and devices magazine</title><addtitle>CD-M</addtitle><description>Recent advances in solid-phase epitaxial recrystallization suggest that this technology may dramatically improve the crystallinity of heteroepitaxial silicon-on-insulators, such as silicon-on-sapphire (SOS). Recent improvements of 0.3- and 0.5-μm SOS films using two solid-phase epitaxial recrystallization processes (SPEAR and DSPE) are reported. Both techniques have reduced the total microtwin densities of SOS samples by more than 100-fold, while increasing electron and hole mobilities approximately 50%. The resulting properties are very close to those of bulk silicon. High-performance submicrometer CMOS devices and circuits in 0.3-μm recrystallized SOS films have been fabricated.</description><subject>CMOS integrated circuits</subject><subject>CMOS technology</subject><subject>Epitaxial growth</subject><subject>Logic gates</subject><subject>Silicon</subject><issn>8755-3996</issn><issn>1558-1888</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>1987</creationdate><recordtype>article</recordtype><recordid>eNo9kD1PwzAURS0EEqWwI7F4YkuxndixR1Q-pVaVKMzRq_OiGrlxiNNC-fWktDA96d1z73AIueRsxDkzN9Px3YgbnY9UKlIu9BEZcCl1wrXWx2SgcymT1Bh1Ss5ifGeMZzpjAxJe0GLdUSg3UFuM1NU0Bu_KpFlCRIqN6-DLgact2nYbO_DefUPnQk1DReezOf103ZJC03hnf_-RdoGOp30CdUkXrgkeWlrixvX75-SkAh_x4nCH5O3h_nX8lExmj8_j20lihRFdUlU2ZTm3AiUgaM0qbXIpFECGADkozSTPc-RKWiNYphFVVmVCaiMWmpfpkFzvd5s2fKwxdsXKRYveQ41hHQuRKZVKI3uQ7UHbhhhbrIqmdStotwVnxc5s0ZstdmaLg9m-crWvOET8x__SH9akdbM</recordid><startdate>19870701</startdate><enddate>19870701</enddate><creator>Vasudev, P. K.</creator><general>IEEE</general><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>7U5</scope><scope>8FD</scope><scope>L7M</scope></search><sort><creationdate>19870701</creationdate><title>Recent advances in solid-phase epitaxial recrystallization of SOS with applications to CMOS and bipolar devices</title><author>Vasudev, P. K.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c292t-ffc3071c2e5aea880f897526aa4eaa7a6805177e165c92048ee64f425892b81d3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>1987</creationdate><topic>CMOS integrated circuits</topic><topic>CMOS technology</topic><topic>Epitaxial growth</topic><topic>Logic gates</topic><topic>Silicon</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Vasudev, P. K.</creatorcontrib><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Solid State and Superconductivity Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE circuits and devices magazine</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Vasudev, P. K.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Recent advances in solid-phase epitaxial recrystallization of SOS with applications to CMOS and bipolar devices</atitle><jtitle>IEEE circuits and devices magazine</jtitle><stitle>CD-M</stitle><date>1987-07-01</date><risdate>1987</risdate><volume>3</volume><issue>4</issue><spage>17</spage><epage>19</epage><pages>17-19</pages><issn>8755-3996</issn><eissn>1558-1888</eissn><coden>ICDMEN</coden><abstract>Recent advances in solid-phase epitaxial recrystallization suggest that this technology may dramatically improve the crystallinity of heteroepitaxial silicon-on-insulators, such as silicon-on-sapphire (SOS). Recent improvements of 0.3- and 0.5-μm SOS films using two solid-phase epitaxial recrystallization processes (SPEAR and DSPE) are reported. Both techniques have reduced the total microtwin densities of SOS samples by more than 100-fold, while increasing electron and hole mobilities approximately 50%. The resulting properties are very close to those of bulk silicon. High-performance submicrometer CMOS devices and circuits in 0.3-μm recrystallized SOS films have been fabricated.</abstract><pub>IEEE</pub><doi>10.1109/MCD.1987.6323128</doi><tpages>3</tpages></addata></record> |
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subjects | CMOS integrated circuits CMOS technology Epitaxial growth Logic gates Silicon |
title | Recent advances in solid-phase epitaxial recrystallization of SOS with applications to CMOS and bipolar devices |
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