A model for the trench transistor

A model for the trench transistor

This paper discusses a model for the trench transistor used in the trench transistor cell (TTC), which is employed in Texas Instruments' 4-Mbit DRAM. PISCES-II simulations are used to study the unique characteristics that result from the nonuniform doping along the channel and the nonuniform ga...

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Veröffentlicht in:IEEE transactions on electron devices 1987-12, Vol.34 (12), p.2485-2492
Hauptverfasser: Banerjee, S., Bordelon, D.M.
Format: Artikel
Sprache:eng
Schlagworte:
Applied sciences
Electronics
Exact sciences and technology
Integrated circuits
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
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Zusammenfassung:This paper discusses a model for the trench transistor used in the trench transistor cell (TTC), which is employed in Texas Instruments' 4-Mbit DRAM. PISCES-II simulations are used to study the unique characteristics that result from the nonuniform doping along the channel and the nonuniform gate oxides in these transistors. The simulations are correlated with experimental data and an analytical description is proposed to qualitatively explain the observed behavior.
ISSN:0018-9383
1557-9646
DOI:10.1109/T-ED.1987.23339