Bit-sequential array for pattern matching
This letter presents the design and analysis of a bit-sequential array for pattern matching applications. The architecture makes multiple use of each data sample, has built-in concurrency and pipelining, and is based on a highly modular design with only nearest neighbor connections between array mod...
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Veröffentlicht in: | Proceedings of the IEEE 1986, Vol.74 (10), p.1465-1466 |
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Hauptverfasser: | , |
Format: | Artikel |
Sprache: | eng |
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Zusammenfassung: | This letter presents the design and analysis of a bit-sequential array for pattern matching applications. The architecture makes multiple use of each data sample, has built-in concurrency and pipelining, and is based on a highly modular design with only nearest neighbor connections between array modules. The array computes all occurrences of a pattern of length m, in the string of length n, in O(m + n) time and O(m) hardware. The pattern and the string are fed in sequentially and the match indicators come out in the same fashion, leading to a significant reduction in silicon area. |
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ISSN: | 0018-9219 1558-2256 |
DOI: | 10.1109/PROC.1986.13652 |