CCD memory using multilevel storage

In CCD multilevel storage, more than one bit of information is stored in a charge packet. Requirements for CCD MLS systems are described, and circuits for the encoding and decoding of charge packets which operate essentially independent of device parameter and geometric tolerances are presented. 3-b...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:IEEE journal of solid-state circuits 1981-10, Vol.16 (5), p.472-478
Hauptverfasser: Terman, L.M., Yee, Y.S., Merrill, R.B., Heller, L.G., Pettigrew, M.B.
Format: Artikel
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:In CCD multilevel storage, more than one bit of information is stored in a charge packet. Requirements for CCD MLS systems are described, and circuits for the encoding and decoding of charge packets which operate essentially independent of device parameter and geometric tolerances are presented. 3-bit operation on a short shift register loop is demonstrated. Requirements on leakage and transfer in efficiency for 2- and 3-bit MLS are discussed.
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.1981.1051625