High-efficiency p +- n - n + back-surface-field silicon solar cells

The design and fabrication of high-efficiency p+-n-n+ back-surface-field silicon solar cells are described. The fabrication process has been developed to yield maximum attainable carrier lifetimes (∼0.7 msec) in the base region of the cell, thereby allowing the back n-n+ junction to effectively enhance the cell performance. A surprising conclusion drawn from a study of the device physics supporting the experimental development of the cell is that the front-surface recombination velocity controls the recombination in the emitter. That is, the bulk p+ emitter is ’’transparent’’ to minority-carrier (electron) flow. The recognition of the significance of the front silicon surface has led to process modifications that result in improvements in both the short-circuit current density and the open-circuit voltage of the cell. With these improvements, the cells exhibit AMl conversion efficiencies of nearly 17%. The fabrication process is reliable and reproducible with exceptionally high yield.